Current state of the art technology for CMOS transistors have low resistance and shallow and abrupt source and drain P-N junctions (extensions). These properties allow the transistor to have reduced source drain parasitic resistance and to control short channel effects. These transistors, however, still suffer from high drain leakage current (high off-state leakage). Drain leakage current in CMOS transistors causes static power issues and is undesirable. Drain leakage current (Idoff) is generated from current from the drain to the source (Isoff), current from the drain to the bulk (Idoff), and current from the drain to the gate (Igoff) when the transistor is off.
Processing of deep submicron devices, such as CMOS transistors, commonly involves shallow angle implantation to place dopant atoms under the gate of the transistors. The implantation of dopant atoms under the gate of the transistors forms pockets which allow the transistors to maximize the drive current between the drain and source. The pockets also allow the transistors to reduce drain leakage current. The maximum manufacturable angle for implant is influenced by the height of neighboring structures of the gate, such as photoresist, and the space between the neighboring structures and the gate. Typically, a larger angle of implantation yields a higher concentration of dopants at the surface of the silicon than the concentration of dopants deeper beneath the gate, which is desirable.